| PART |
Description |
Maker |
| DTTI5516-BRICK DTTI5516 DTTI5516XWC DTTI5516AUA |
DTTI5516 SINGLE MODULE DEMODULATOR AND DECODER IC FOR DIGITAL VIDEO SET-TOP BOXES Data Briefing
|
ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
意法半导
|
| ST72260G1 ST72262G1 ST72262G2 ST72264G1 ST72264G2 |
8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES (DATA BRIEFING)
|
SGS Thomson Microelectronics
|
| S-GOLD3H |
Presentation of Prof. Dr. Hermann Eul on the occation of a press briefing on February 10 in Munich
|
Infineon
|
| HI-8685PST-10 HI-8685PJI HI-8685PJI-10 HI-8685PJT- |
System component for interfacing incoming ARINC 429 signals to 16-bit parallel data
ARINC INTERFACE DEVICE ARINC 429& 561 SERIAL DATA TO 16-BIT PARALLEL DATA 1 CHANNEL(S), SERIAL COMM CONTROLLER, PQCC28
384 MCELL 3 VOLT ZERO POWER ISP CPLD - NOT RECOMMENDED for NEW DESIGN
ARINC 429 & 561 SerialDatato16-BitParallelData
ARINC INTERFACE DEVICE ARINC 429& 561 SERIAL DATA TO 16-BIT PARALLEL DATA
|
Holt Integrated Circuit...
HOLT INTEGRATED CIRCUITS INC
Holt Integrated Circuits, Inc.
http://
|
| M13S2561616A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M13S5121632A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| W631GG6KB-15 W631GG6KB12A W631GG6KB12I W631GG6KB12 |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| AD1801JST |
1400 kbps DATA, MODEM-DATA/FAX/VOICE, PQFP128 TQFP-128
|
Analog Devices, Inc.
|
| HI-8787 |
(HI-8787 / HI-8788) 16-BIT PARALLEL DATA CONVERTED 429&561 SERIAL DATA OUT
|
Holt Integrated Circuits
|
| M14D2561616A-2E |
Internal pipelined double-data-rate architecture; two data access per clock cycle
|
Elite Semiconductor Mem...
|
| LC7454A LC7454M |
TV, VCR, and Video Camera Applications: Front end for data slicing
CMOS Data Slicer
|
Sanyo Semicon Device
|
| S1A0905X01 |
RDS (RADIO DATA SYSTEM) DEMODULATOR IC Data Sheet
|
Samsung Electronic
|
